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VHDL 2008: Just the New Stuff > 디지털 논리

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VHDL 2008: Just the New Stuff
판매가격 19,000원
저자 Ashenden
도서종류 외국도서
출판사 Elsevier
발행언어 영어
발행일 2007-12-07
페이지수 256
ISBN 9780123742490
도서구매안내 온, 온프라인 서점에서 구매 하실 수 있습니다.

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  • 도서 정보

    도서 상세설명

    Preface ix
    Enhanced Generics 1
    Generic Types 1
    Generic Lists in Packages 6
    Local Packages 11
    Generic Lists in Subprograms 15
    Generic Subprograms 21
    Uninstantiated Methods in Protected Types 32
    Generic Packages 36
    Use Case: Generic Memories 43
    Other Major Features 53
    External Names 53
    Force and Release 63
    Context Declarations 67
    Integrated PSL 70
    IP Encryption 77
    Key Exchange 96
    VHDL Procedural Interface (VHPI) 97
    Direct Binding 97
    Tabular Registration and Indirect Binding 99
    Registration of Applications and Libraries 101
    Type System Changes 103
    Unconstrained Element Types 103
    Composite Types 103
    Subtype Indications and Constraints 107
    Use of Composite Subtypes 109
    Variable and Signal Declarations 110
    Constant Declarations 110
    Attribute Specifications 111
    Allocated Objects 111
    Interface Objects 112
    Summary: Determining Array Index Ranges 117
    Type Conversions 118
    Alias Declarations and Subtype Attributes 119
    Resolved Composite Subtypes 122
    Resolved Elements 123
    New and Changed Operations 127
    Array/Scalar Logical Operations 127
    Array/Scalar Addition Operators 129
    Logical Reduction Operators 130
    Condition Operator 132
    Matching Relational Operators 133
    Maximum and Minimum 138
    Mod and Rem for Physical Types 140
    Shift Operations 141
    Strength Reduction and \'X\' Detection 142
    New and Changed Statements 143
    Conditional and Selected Assignments 143
    Sequential Signal Assignments 143
    Forcing Assignments 146
    Variable Assignments 147
    Matching Case Statements 149
    Matching Selected Assignments 150
    If and Case Generate 151
    Configuration of If and Case Generate 155
    Modeling Enhancements 159
    Signal Expressions in Port Maps 159
    All Signals in Sensitivity List 161
    Reading Out-Mode Ports and Parameters 162
    Slices in Aggregates 166
    Bit-String Literals 167
    Improved I/O 169
    The To_String Functions 169
    Predefined To_string Functions 170
    Overloaded To_string Functions 171
    The To_ostring and To_hstring Functions 172
    The Justify Function 173
    Newline Formatting 173
    Read and Write Operations 174
    The Tee Procedure 177
    The Flush Procedure 178
    Standard Packages 179
    The Std_logic_1 164 Package 179
    The Numeric_bit and Numeric_std Packages 180
    The Numeric Unsigned Packages 182
    The Fixed-Point Math Packages 182
    The Floating-Point Math Packages 186
    The Standard Package 191
    The Env Package 192
    Operator Overloading Summary 193
    Conversion Function Summary 196
    Strength Reduction Function Summary 204
    Miscellaneous Changes 207
    Referencing Generics in Generic Lists 207
    Function Return Subtype 208
    Qualified Expression Subtype 209
    Type Conversions 209
    Case Expression Subtype 211
    Subtypes for Port and Parameter Actuals 212
    Static Composite Expressions 213
    Static Ranges 214
    Use Clauses, Types, and Operations 215
    Hiding of Implicit Operations 216
    Multidimensional Array Alias 217
    Others in Aggregates 217
    Attribute Specifications in Package Bodies 219
    Attribute Specification for Overloaded Subprograms 219
    Integer Expressions in Range Bounds 220
    Action on Assertion Violations 221
    \'Path_Name and \'Instance_Name 221
    Non-Nesting of Architecture Region 223
    Purity of Now 223
    Delimited Comments 224
    Tool Directives 225
    New Reserved Words 225
    Replacement Characters 226
    What\'s Next 229
    Object-Oriented Class Types 229
    Standard Components Library 232
    Randomization 232
    Functional Coverage 235
    Alternatives 235
    Getting Involved 235
    Index 237
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